The present invention is directed to integrated circuits and their processing for the manufacture of semiconductor devices. More particularly, the invention provides a CVD deposition method with high gapfill capability that can fill trenches with a width 0.10 μm or smaller. Merely by way of example, the invention has been applied to making shallow trench isolation (STI) regions. But it can be recognized that the invention has a much broader range of applicability.
Integrated circuits or “ICs” have evolved from a handful of interconnected devices fabricated on a single chip of silicon to millions of devices. Current ICs provide performance and complexity far beyond what was originally imagined. In order to achieve improvements in complexity and circuit density (i.e., the number of devices capable of being packed onto a given chip area), the size of the smallest device feature, also known as the device “geometry”, has become smaller with each generation of ICs. Semiconductor devices are now being fabricated with features less than a quarter of a micron across.
Increasing circuit density has not only improved the complexity and performance of ICs but has also provided lower cost parts to the consumer. An IC fabrication facility can cost hundreds of millions, or even billions, of dollars. Each fabrication facility will have a certain throughput of wafers, and each wafer will have a certain number of ICs on it. Therefore, by making the individual devices of an IC smaller, more devices may be fabricated on each wafer, thus increasing the output of the fabrication facility. Making devices smaller is very challenging, as each process used in IC fabrication has a limit. That is to say, a given process typically only works down to a certain feature size, and then either the process or the device layout needs to be changed. Additionally, as devices require faster and faster designs, process limitations exist with conventional processes and materials.
One such example of a process limitation deals with the difficulty of filling a trench that has a high aspect ratio, meaning that the ratio of the depth of the trench to the trench opening is large. A high aspect ratio can cause problems during the trench fill process in that the deposited material is not uniformly distributed over the surface area of the trench, leading to overhang of the deposited material at the trench corner and voids at the center of the trench. This can lead to problems with device performance and electrical reliability.
From the above, it is seen that an improved technique for processing semiconductor devices is desired.